Model checking is an automatic technique for verifying hardware and software systems. The advance of the research in this area in the past few years has lead to a significant improvement of the model checking tools. Successful applications of model checking have been reported in the verification of a wide variety of systems, like complex sequential circuit designs and communication protocols. An important evidence of the great practical potential of model checking is the development of in-house model checking tools within the major companies from the information and telecommunication industry.
The objective of the Model Checking Day is to bring together researchers and practitioners from academia and industry who are interested in model checking. The presentations are featuring both practical and theoretical advances in the area. This includes new techniques and methodologies, as well as experience with their application in various areas, such as embedded systems, communication protocols, hardware components, production processes, etc.
It is expected that the Model Checking Day will provide an opportunity to exchange experiences, as well as that it will foster a discussion about new ideas and the latest developments in the area.
| 09.45 | Welkom |
| 10:00 |
Opening Jos Baeten (TU Eindhoven) |
| 10:10 |
Abstracting C with abC (new title talk) Dennis Dams (TU Eindhoven & Bell Labs, Lucent Technologies) |
| 10:40 |
Model Checking of Reusable Hardware Components Marten van Hulst (Philips) |
| 11:10 |
Tea and coffee break |
| 11:30 |
Guided Search and Cost-Optimality in Timed Model Checking Frits Vaandrager (KU Nijmegen) |
| 12:00 |
Model Checking Systems Described Using UML Activity Diagrams within ASML Rick van Lierop (ASML) |
| 12:30 |
Lunch |
| 13:30 |
Analyzing Markov Chains by Model Checking Holger Hermanns (University of Twente) |
| 14:00 |
Parametric Model Checking of Fair TCTL Ronald Lutje Spelberg (Thales Naval Netherlands) |
| 14:30 |
Tea and coffee break |
| 14:45 |
Invited Lecture: Black Box Checking Doron Peled (University of Texas) |
| 15:30 |
Break |
| 16:00 |
Enhancing State Space Reduction Techniques For Model Checking Defence of the Ph.D. thesis of Dragan Bosnacki (TU Eindhoven) |
OrganisationTechnische Universiteit EindhovenOrganising committee
Jos Baeten |
Contact address:
TU Eindhoven |
![]() Formal Methods Group Technische Universiteit Eindhoven |
![]() Instituut voor Programmatuurkunde en Algoritmiek |