Date and Time: Thursday, 18 June 2009, 15:30 - 16:30

Location: HG 6.96

Speaker: Harsh Beohar (FM)

Title: Design of asynchronous supervisors

Abstract:

One of the main drawbacks while implementing the interaction between a plant and a supervisor, synthesised by the supervisory control theory of Ramadge & Wonham, is the inexact synchronisation. Balemi was the first to consider this problem, and the solutions given in his Phd thesis were in the domain of automata theory. Our goal is to address the issue of inexact synchronisation in a process algebra setting, because we get concepts like modularity and abstraction for free, which are useful to further analyze the synthesised system. We give a method to redesign a closed loop system in an asynchronous setting such that the modified closed loop satisfies the same requirements as the original one. We modify a given closed loop system by introducing buffers in the plant model.