M.R. Mousavi, P. Le Guernic, J.-P., Talpin, S.K. Shukla, T. Basten, Proceedings of the Conference on Design Automation and Test in Europe (DATE'04), Paris, France, pp. 384--389, IEEE Computer Society Press, February 2004.
In this paper, we lay a foundation for modeling and validation of asynchronous designs in a multi-clock synchronous programming model. This allows us to study properties of globally asynchronous systems using synchronous simulation and model-checking toolkits. Our approach can be summarized as automatic transformation of a design consisting of two asynchronously composed synchronous components into a fully synchronous multi-clock model preserving behavioral equivalence. The ultimate goal of this research is to provide the ability to model and build GALS systems in a fully synchronous design framework and deploy it on an asynchronous network preserving all properties of the system proven in the synchronous framework.
A preliminary version of this paper appeared as Technical Report Technical Report RR-4935, INRIA, Rennes, France and Technical Report 2003-12, Fermat Lab., Department of Electrical Engineering, Virginia Tech, Blacksburg, VA, USA.
(Paper in .ps format in .pdf format Presentation in .pdf format )
@inProceedings{MousaviDate04,
title = "Modeling and Validating Globally Asynchronous Design in Synchronous Frameworks",
author = "Mousavi, MohammadReza and Le Guernic, Paul and Talpin, Jean-Pierre and Shukla, Sandeep Kumar and Basten, Twan",
booktitle = "Proceedings of the Conference on Design Automation and Test in Europe (DATE'04)",
publisher = "IEEE Computer Society Press",
pages = "384--389",
year = "2003",
}