The Lentedagen are an annual multi-day event, dedicated to a specific theme of current interest to the research community of IPA. This year's Lentedagen are dedicated to the subject Mult-Core Computing.
For decades the performance of computers increased exponentially over time by reducing the number of clock cycles per instruction (from about ten to well below one) and by increasing the clock frequency (from 100 KHz up to multiple GHz). With both trends are exhausted, the only path left to increase compute power is multicore computing. The semiconductor industry routinely proposes single ICs (chips) with up to 64 identical, programmable cores. Many (thousands) of these ICs can be combined to deliver up to 1 peta FLOPs (10^15 floating-point operations per second).
Hardware challenges are numerous, especially related to power consumptions. The fundamental multicore challenge, however, is how to organize an application such that all these cores can work together in a reasonably efficient way? This requires innovation on programming models, compilers, operating system technology, and (application-specific) software architectures. Many of these challenges will be addressed during the 2010 IPA Spring days.
The Springdays aim to provide an overview of research on Multi-Core Computing in and around IPA. Most speakers and talks are now confirmed, this webpage will be updated with titles and abstacts as they become available.
The program was composed by Kees van Berkel (ST-Ericsson, TU/e), Andy Pimentel (Uva) and Michel Reniers (IPA, TU/e).
|13:30-14:30||Chris Jesshope (UVA): Making Multi-core Computing Mainstream|
|15:00-15:45||Ana Varbanescu (TUD): The Programmability Gap: a View from High Performance Computing|
|16:15-17:00||Julien Schmaltz (RU): Formal Validation of On-Chip Communication Infrastructures: The GeNoC Approach|
|17:00-17:45||Dragan Bosnacki (TU/e): Challenges and Prospects of Multi-core and GPU Model Checking|
|17:45-18:30||Anton Wijs (TU/e): Multi-core LTL Model Checking|
|9:00-9:45||Kees van Berkel (ST-Ericsson, TU/e): Multi-Core For Mobile Phones [paper]|
|9:45-10:30||Orlando Moreira (ST-Ericsson): A Dataflow-centric Software Architecture for Hard-Real-Time Software-Defined Radio|
|11:00-11:45||Thilo Kielmann (VU): Computing in the Mist: Writing Applications for Unknown Machines|
|11:45-12:30||Andy Pimentel (UvA): Designing your favorite many-core system-on-chip in 24 hours|
|13:30-15:00||Rob van Nieuwpoort (ASTRON, VU): The LOFAR software telescope and many-core hardware|
|15:45-16:30||Kees Goossens (TU/e): Performance virtualisation for enhanced MPSOC robustness and performance verification|
|16:30-17:15||Benny Åkesson (TU/e): Predictable and Composable System-on-Chip Memory Controllers|
|9:00-9:45||Michael Weber (UT): How to Survive Developing Multi-Core Programs|
|9:45-10:30||Alfons Laarman (UT): Shared hashtables in parallel model checking|
|11:00-11:45||Paul Stravers (Vector Fabrics): Think sequential, go parallel|
|11:45-12:30||Jeroen Leijten (Silicon Hive): The next major step in migrating hardware designs to software|
|12:30-13:30||Lunch and departure|