VLSI Programming (2IN30 (formerly 2L760))

Fall  2005/2006

See also: the general course information for the course 2IN30. This is a SAN course, see http://www.win.tue.nl/san.

Intended for: Computer Science Masters

Important notes: Lecture notes will become available during the first week. You can pick up a copy at the secretary’s office, HG 5.06.


A laptop computer, a CD player and a GSM telephone have in common the fact that their price and functionality are largely determined by embedded VLSI circuits (VLSI = Very Large Scale Integrated). The design of such "systems on silicon" is becoming more and more a combined challenge for both computer science and electrical engineering. If you wonder how such a VLSI circuit looks from the inside or if you would like to fiddle around with a 32-bit RISC processor using state-of-the-art design tools then, here's your chance.

The course has the following goals:

1.      give insight in the possibilities of VLSI as an implementation medium for parallel computations;

2.      give insight in trade-offs with respect to chip area, computation speed, energy dissipation and testability;

3.      develop VLSI programming skills.

Starting from the VSLI medium (a uniform substrate of about one million transistors and 100 meters of aluminum wire per cm2), three abstractions are developed: production rules, handshake circuits and the VLSI-language Tangram. Tangram was developed by Philips Research Lab. based on Hoare's communicating sequential processes. A so-called silicon compiler makes it possible to translate a Tangram program transparently into a handshake circuit and subsequently into an asynchronous circuit, expressed using production rules. IC area, speed, energy dissipation and testability can be analysed interactively. Looking at these quantities and looking at trade-offs is characteristic for VLSI programming.

After this introduction, VLSI-programming is practiced in the second half of the term. First there is a introduction into the toolset followed by a thorough analysis of a subset of the DLX (a MIPS-alike RISC processor, see Hennessey & Patterson]). Assignments focus on extending the initial version, making it cheaper through resource sharing, speeding it up through pipelining, making it more power efficient and on testing. Final examination is through a report followed by a discussion with the instructors. A precondition for entering the practical work is that a few small exercises have been done. The total amount of work comprises 4 ects (110 hours).


There will be 9 weeks of regular lectures. The first three afternoons are mainly filled with lecturing and you are supposed to study the lecture notes in these weeks. At the end of this period you wil receive the first exercise. Starting from week 5 we will use the programming language Tangram and its programming environment for a series of exercises. Working with Tangram will fill the second half of the afternoons; instructors will be around to help you.

You will need a notebook with eXceed to do your practical work. eXceed can be obtained through the software distribution of the university. You must obtain access to the one of the departments’ Unix servers. If you do not already have an account on one of these machines you can obtain one through the BCF (HG floor 8).


·        Intermediate exercise, handed out the third lecture and which is due on ??????

·        Report with presentation and discussion of the exercises followed. Deadline for the report is ????. Some guidelines (apply when relevant):

·        Include an analysis of the problem.

·        Include an analysis of the performance bottle necks and a motivation for the selected optimizations

·        Describe options, motivate design choices.

·        Argue the correctness of  the program, e.g. by using invariants. This is especially relevant for Assignments 5 and 6.

·        Use (block) diagrams  to explain the overall structure of your dlx2 and dlx3 programs.

·        Consider tables to present numeric results.

·        Compare different versions of the DLX, and explain the differences in  throughput, size, and power.

·        In general, motivation of design choices and interpretation of results are considered more important than the results themselves!

·        An oral examination about this report as well as the intermediate exercise.


·        Grading is based on the intermediate assignment, the quality of the programs, the report and the discussion.

·        We will make appointments through email.

·        NOTE: hand your work in on paper and keep a copy for yourself. Include your name and student number and a way to reach yourself electronically. Prepare yourself for the examination (read your report again and the notes, when necessary).

Time & Location: Tuesday, 13.30-17.00 (lectures until 15.30) Matrix 1.46.

Lecturer: Prof.dr.ir. Kees van Berkel (HG.5.08) & dr. ir. Ad Peeters

Backup: dr. J.J. Lukkien (HG. 5.07)


·         Handouts of the slides.

·         Introduction to VLSI programming: Lecture Notes 2IN30, Kees van Berkel, March-April 1997 (handed out in class).

Aug. 30

2 | 0 hours

intro; VLSI

Sep.   6

3 | 0 hours

handshake circuits

Sep. 13

3 | 0 hours

handshake circuits    assignment

Sep. 20

3 | 0 hours


Sep.  27


no lecture

Oct.  4


no lecture

Oct. 11

1 | 2 hours

demo, fifos, registers  | deadline assignment

Oct.  18

1 | 2 hours

design cases;        

Oct.  25

1 | 2 hours

DLX introduction

Nov.  1

1 | 2 hours

low-cost DLX

Nov.   8

1 | 2 hours

high-speed DLX

Nov.  29


deadline final report

Tangram & exercises

·         Before you can use the toolset, first type “source ~johanl/bin/tgsetup”

·         Manual

·         Example: Conway + input files (‘in’ and ‘a’)

·         Exercise 1: Shift registers (description of the exercise, example programs and input file)

·         Exercise 2: First-in-first-out buffers (idem)

·         Exercise 3: Greatest Common Divisor, you need to make one input file: ab.

·         Exercise 4: DLX, initial version, you need several files described in this and subsequent assignments.

·         Exercise 5: DLX, improvements, this is assignment 5 in the same directory as above.

·         Exercise 6: DLX, 3 stages with branch-delay, this is assignment 6 in the same directory.


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